Block III . PROPOSED ERROR TOLERANT MODIFIED BOOTH MULTIPLIER
نویسندگان
چکیده
Multipliers are the fundamental arithmetic unit in multimedia and digital signal processing applications. The fixed width multipliers are used in those applications where we have to maintain a fixed format and allow a little accuracy loss of output data. In this paper we have proposed a low power technique for high speed modified booth multiplication. Even though modified booth multiplier reduces truncation error it consumes more power for the purpose and reduces speed. To reduce power consumption in truncation process we introduce error tolerant adder in modified fixed width Booth multiplier The ETA is able to ease the strict restriction on accuracy, and at the same time achieve tremendous improvements in both the power consumption and speed performance. KeywordsDigital Signal Processing (DSP), Error tolerant adder, Fixed width multiplier, modified Booth multiplier, Signal Conditioning (SC Generator)
منابع مشابه
Microsoft Word - Final_Feb_20_R4Booth_Mult_Brief
Approximate computing is an attractive design methodology to achieve low power, high performance (low delay) and reduced circuit complexity by relaxing the requirement of accuracy. In this paper, approximate Booth multipliers are designed based on approximate radix-4 modified Booth encoding (MBE) algorithms and a regular partial product array that employs an approximate Wallace tree. Two approx...
متن کاملLow Complexity and High Accuracy Fixed Width Modified Booth Multiplier
In many high speed Digital Signal Processing (DSP) and multimedia applications, the multiplier plays a very important role because it dominates the chip power consumption and operation speed. In DSP applications, in order to avoid infinite growth of multiplication bit width, it is necessary to reduce the number of multiplication products. Cutting off n-bit Less Significant Bit (LSB) output can ...
متن کاملDesign and Implementation of Signed, Rounded and Truncated Multipliers using Modified Booth Algorithm for Dsp Systems
Multipliers have a significant impact in the performance of the entire Dsp system. Many highperformance algorithms and architectures have been proposed to accelerate multiplication without increasing the hardware. In previous papers, the truncation error is reduced by adding error compensation circuits. In this paper, truncation error is not more than 1 ULP (unit of least position). So there is...
متن کاملDesign of Low- Power High-Speed Error Tolerant Shift and Add Multiplier
Problem Statement: In this study, we had proposed a low power architecture for high speed multiplication. Approach: The modifications to the conventional shift and add multiplier includes introduction of modified error tolerant technique for addition and enabling of adder cell by current multiplication bit of the multiplier constant. The proposed architecture enables the removal of input multip...
متن کاملDesign & Implementation of Fixed Width Modified Booth Multiplier Saroj
Multiplication is the main operation in many signal processing algorithms. High accuracy and low power dissipation are the most important objectives in many multimedia and lossy applications such as filtering, convolution, Euclidean distance, fast Fourier transform (FFT).The fixed width multipliers are used to maintain a fixed format and allow a little accuracy loss of output data. In this pape...
متن کامل